The circuit in the figure is reduces noise and ripple circuit by at least 35 dB over the audio range of 100 Hz to 20 kHz. This reduces noise and ripple circuit provides a clean source of 5V power for driving audio circuits in portable applications such as cellular phones and multimedia notebook computers. Most linear regulators reject noise only to about 100 Hz, and the bulk of a low-frequency passive filter is unwelcome in portable applications. The figure is show below;
The principle work of the circuit accepts noisy VCC in the range of 4.5 to 6V and produces quiet VCC at a dc level 7% lower than the input. For example, the circuit produces 4.65V at 1A from a nominal 5V source, with only 200 µA of quiescent current. The layout is small; the circuit consists of one SOT-23 transistor, one shrink SO-8 op amp, and a few passive components. The largest capacitor is 10 µF, and the resistors can be 0.1W or surface-mount 0805. The circuit acts as a wide-bandwidth buffered voltage follower (not a regulator) with a dc output level that is 7% below that of VIN. R1 and R3 form a voltage divider that provides the 7% attenuations, and C1 helps to form a 93% filtered replica of VIN at the op amp’s inverting input. The op amp’s small input-bias current (typically 25 nA) allows large resistor values for R1 and R3, yet limits the maximum dc error to only 20 mV. The result is a low-pass filter with a 2-Hz corner frequency that provides 20 dB of attenuation at 20 Hz.
Because the op amp’s common-mode input range extends from rail to rail, its noninverting input can directly sample the output voltage. R2 and C2 filter the op amp’s supply voltage to provide the op amp with a lower output impedance and better power-supply rejection at high frequencies. This filter’s 300-Hz roll-off augments the op amp’s already high 110-dB PSRR.
The principle work of the circuit accepts noisy VCC in the range of 4.5 to 6V and produces quiet VCC at a dc level 7% lower than the input. For example, the circuit produces 4.65V at 1A from a nominal 5V source, with only 200 µA of quiescent current. The layout is small; the circuit consists of one SOT-23 transistor, one shrink SO-8 op amp, and a few passive components. The largest capacitor is 10 µF, and the resistors can be 0.1W or surface-mount 0805. The circuit acts as a wide-bandwidth buffered voltage follower (not a regulator) with a dc output level that is 7% below that of VIN. R1 and R3 form a voltage divider that provides the 7% attenuations, and C1 helps to form a 93% filtered replica of VIN at the op amp’s inverting input. The op amp’s small input-bias current (typically 25 nA) allows large resistor values for R1 and R3, yet limits the maximum dc error to only 20 mV. The result is a low-pass filter with a 2-Hz corner frequency that provides 20 dB of attenuation at 20 Hz.
Because the op amp’s common-mode input range extends from rail to rail, its noninverting input can directly sample the output voltage. R2 and C2 filter the op amp’s supply voltage to provide the op amp with a lower output impedance and better power-supply rejection at high frequencies. This filter’s 300-Hz roll-off augments the op amp’s already high 110-dB PSRR.
