This circuit is utilizes AC carrier modulation techniques to meet APD current monitor requirements. This circuit features 0.4% accuracy over the sensed current range, runs from a 5V supply and has the high noise rejection characteristics of carrier based “lock in” measurements. This is the figure of the circuit.
This circuit is based on The LTC1043 that is used to switch array is clocked by its internal oscillator. Oscillator frequency, set by the capacitor at Pin 16, is about 150Hz. S1 clocking biases Q1 via level shifter Q2. Q1 chops the DC voltage across the 1kW current shunt, modulating it into a differential square wave signal which feeds A1 through 0.2mF AC coupling capacitors. A1’s single-ended output biases demodulator S2, which presents a DC output to buffer amplifier A2. A2’s output is the circuit output. Switch S3 clocks a negative output charge pump which supplies the amplifier’s V– pins, permitting output swing to (and below) zero volts. The 100k resistors at Q1 minimize its on-resistance error contribution and prevent destructive potentials from reaching A1 (and the 5V rail) if either 0.2mF capacitor fails. A2’s gain of 1.1 corrects for the slight attenuation introduced by A1’s input resistors. In practice, it may be desirable to derive the APD bias voltage regulator’s feedback signal from the indicated point, eliminating the 1kW shunt resistor’s voltage drop. [Schematic’s circuit source: Linear Technology Notes].
