This is a design circuit for analog to digital converter that can be used in data acquisition. This circuit is based on ADC0833 and controlled by INS8048. Before explaining the system configuration, it is worthwhile for one to understand the operation of the INS8048 processor's I/O ports. Ports 1 and 2 are quasi-bidirectional; that is, they can be used as inputs or outputs while being statically latched. If a ``1'' is written into any port bit, that bit can function as an input or as a high level output. If a ``0'' is written into any port bit, that bit can function only as a low level output.
Outputs are latched until changed and inputs are unlatched and must be read immediately. When used with the ANL Pp, A (AND accumulator to port) or the ORL Pp, A (OR accumulator to port) instructions, these ports provide an efficient means of handling single line inputs and outputs. Port expansion, if anticipated, is handled via the lower four bits of Port 2. Only four pins of the processor's Port 1 or Port 2 are needed for physical interfacing. The ANL or ORL instructions set up the port pins to produce the proper outputs (CS, CLK, and the multiplex address) or to allow for data input from the A/D converter.
[Circuit schematic source: National Semiconductor Notes].
