Here’s a
design circuit for monitoring supply voltages of ±5
V and ±12 V is readily constructed as shown in the diagram. It is appreciably
simpler than the usual monitors that use comparators, and AND gates. Here’s the
figure of the circuit;
The
circuit is not intended to indicate the level of the inputs. In normal
operation, transistors T1 and T3 must be seen as current sources. The drop
across resistors R1 and R2 is 6.3 V (12 –5 –0.7). This means that the current
is 6.3mA and this flows through diode D1 when all four voltages are present.
However, if for instance, the –5 V line fails, transistor T3 remains on but the
base-emitter junction of T2 is no longer biased, so that this transistor is cut
off. When this happens, there is no current through D which then goes out.
